All articles tagged with #avx 512
A Linux kernel patch adds an AVX-512-accelerated xor_gen() for RAID parity (RAID 5/6), led by Eric Biggers, with consolidated CPU feature checks and impressive gains on AMD Zen 5 hardware, targeting mainline inclusion in the v7.4 cycle for multi-disk arrays.
Intel’s Nova Lake CPUs will reintroduce AVX-512 on client CPUs, enabling 512-bit vector instructions on both P-Cores and E-Cores via the AVX-10.2 ISA. This marks AVX-512’s return to consumer hardware after six years (last on Tiger Lake), with Intel reviving SMT on Coral Rapids Xeons as part of the same trend. AMD has offered AVX-512 on Zen 4/Zen 5, so the move helps Intel compete on performance for workloads that rely on wide vector ops, potentially delivering meaningful gains (reported up to about 43% vs standard AVX in some scenarios), though real-world results will vary by software and workload.
TechPowerUp reports AMD's Ryzen 10000 ‘Olympic Ridge’ will launch with Zen 6 cores in single-CCD SKUs (6/8/10/12 cores) and two-CCD SKUs (12/16/20/24 cores) on the AM5 socket, built on TSMC's 2nm N2 process. Each CCD can hold up to 48 MB of L3 cache (96 MB total for all cores), with potential 3D V-Cache enhancements, and AVX-512 support to match advanced x86 extensions.
AMD has integrated 'Znver6' patches into the GCC compiler ahead of the Zen 6 launch, enabling early software support for new instructions like AVX-512 on consumer CPUs, aligning with Intel's proactive approach and addressing previous delays that hindered optimized development for AMD's latest processors.
FFmpeg developers have implemented a handwritten AVX-512 assembly code path, achieving performance boosts of up to 94 times in video processing tasks. This optimization leverages the AVX-512 instruction set to process large data chunks in parallel, significantly outperforming standard implementations and other SIMD instruction sets like AVX2 and SSSE3. The results underscore the potential of hand-optimized assembly code for enhancing compute-heavy tasks in multimedia processing.
Llamafile 0.7, released by Mozilla Ocho, introduces AVX-512 support, resulting in around 10x faster prompt evaluation times for users with CPUs like AMD Zen 4. This release also brings BF16 CPU support, a security fix, various Windows improvements, and faster prompt evaluation on the Raspberry Pi 5 with F16 weights.
CachyOS Linux distribution is experimenting with x86-64-v4 repository, offering optimized packages for Intel and AMD systems with AVX-512 support, providing better performance for compute intensive applications. The repository has been trialed since December, targeting AMD Zen 4 and newer Intel hardware, and is currently collecting user feedback. Users interested in trying out the x86-64-v4 packages can find details on the CachyOS blog.
The ASUS ROG Ally handheld, equipped with AMD Ryzen Z1 APUs with AVX-512 support, delivers great emulation performance across various emulators including RPCS3, Dolphin, PS2/PCSX2, PSP, 3DS Citra, Xbox 360, and Yuzu. The handheld offers solid 60 FPS at 1080p across all titles and outstanding 60 FPS at 1080p for God of War 3 on RPCS3 emulator. The Z1 Extreme variant offers better battery timings and power due to its handheld-exclusive optimizations.