
AMD Unveils Zen 6 Venice EPYC: 256‑Core HPC Power on 2nm
AMD teased its 6th‑gen EPYC Venice CPUs based on Zen 6, led by a 256‑core flagship built for HPC and AI workloads. The chip combines eight CCDs with two large IO dies, and uses TSMC’s 2nm process to enable PCIe 6.0, UCIe, and DDR5 support, delivering AMD’s claimed ~70% gains in performance and efficiency and a 30%+ increase in thread density. Positioned for Helios AI racks to handle agentic AI workloads, Venice faces competition from Nvidia’s Vera systems as CPUs become more central to data‑center AI workflows.
